Digital logic design using verilog : coding and RTL synthesis / by Vaibbhav Taraate.
Material type: TextLanguage: English Publication details: Singapore : Springer, 2022.Edition: 2nd edDescription: xxv, 604 p. : ill. ; 24 cmISBN:- 9789811632013
- 621.3815 TAR/D
Item type | Current library | Home library | Collection | Call number | Status | Date due | Barcode | Item holds | |
---|---|---|---|---|---|---|---|---|---|
Technical Reference Book | Central Library, IIT Bhubaneswar | Central Library, IIT Bhubaneswar | SES | 621.3815 TAR/D (Browse shelf(Opens below)) | Available | 11041 |
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621.3815 SHA/E Electronic avayav aevam yuktiyaan / | 621.3815 SVO/D Dorf's introduction to electronic circuits / | 621.3815 SVO/D Dorf's introduction to electronic circuits / | 621.3815 TAR/D Digital logic design using verilog : coding and RTL synthesis / | 621.3815 TRI/S Simulation of transport in nanodevices / | 621.3815 UYE/C Chip design for submicron VLSI : | 621.3815 VIG/G 5G and e-band communication circuits in deep-scaled CMOS / |
Includes bibliographical references and index.
Introduction -- Combinational Logic Design (Part I) -- Combinational Logic Design (Part II) -- Combinational Design Guidelines -- Sequential Logic Design -- Sequential Design Guidelines -- Complex Designs using Verilog RTL -- Finite State Machines -- Simulation Concepts and PLD Based Designs -- RTL Synthesis -- Static Timing Analysis (STA) -- Constraining Design -- Multiple Clock Domain Designs -- Low Power Design -- RTL Design for SOCs.
This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students and hobbyists.
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