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Digital logic design using verilog : (Record no. 14159)

MARC details
000 -LEADER
fixed length control field	02420cam a22003135i 4500
001 - CONTROL NUMBER
control field	11041
003 - CONTROL NUMBER IDENTIFIER
control field	IN-BhIIT
005 - DATE AND TIME OF LATEST TRANSACTION
control field	20240704124915.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field	160517s2016 ii \|\|\|\| o \|\|\|\| 0\|eng
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN	9789811632013
040 ## - CATALOGING SOURCE
Original cataloging agency	IN-BhIIT
041 ## - LANGUAGE CODE
Language code of text	eng
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number	621.3815
Book number	TAR/D
100 1# - MAIN ENTRY--AUTHOR NAME
Personal name	Taraate, Vaibbhav,
Relator term	Author.
245 10 - TITLE STATEMENT
Title	Digital logic design using verilog :
Sub Title	coding and RTL synthesis /
Statement of responsibility, etc	by Vaibbhav Taraate.
250 ## - EDITION STATEMENT
Edition statement	2nd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication	Singapore :
Name of publisher	Springer,
Year of publication	2022.
300 ## - PHYSICAL DESCRIPTION
Number of Pages	xxv, 604 p. :
Other physical details(ill.)	ill. ;
Dimensions(size)	24 cm.
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc	Includes bibliographical references and index.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note	Introduction -- Combinational Logic Design (Part I) -- Combinational Logic Design (Part II) -- Combinational Design Guidelines -- Sequential Logic Design -- Sequential Design Guidelines -- Complex Designs using Verilog RTL -- Finite State Machines -- Simulation Concepts and PLD Based Designs -- RTL Synthesis -- Static Timing Analysis (STA) -- Constraining Design -- Multiple Clock Domain Designs -- Low Power Design -- RTL Design for SOCs.
520 ## - SUMMARY, ETC.
Summary, etc	This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students and hobbyists.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term	Electronic circuits.

Topical Term	Electronics.

Topical Term	Logic design.

Topical Term	Microelectronics.

Topical Term	Circuits and Systems.

Topical Term	Electronics and Microelectronics, Instrumentation.
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type	Technical Reference Book

Holdings
Withdrawn status	Lost status	Damaged status	Not for loan	Collection code	Home library	Current library	Date acquired	Source of acquisition	Cost, normal purchase price	Full call number	Accession Number	Cost, replacement price	Price effective from	Koha item type
Not withdrawn	Not Lost	not damaged		SES	Central Library, IIT Bhubaneswar	Central Library, IIT Bhubaneswar	13/03/2024	25	5253.01	621.3815 TAR/D	11041	7195.90	13/03/2024	Technical Reference Book