Logic synthesis and verification algorithms / by Gary Hachtel and Fabio Somenzi.
Material type:
TextLanguage: English Publication details: New York : Springer, c2006.Description: xxxii, 564 p. : ill. ; 26 cmISBN: - 9780387310046
- 621.395 HAC/L
| Item type | Current library | Home library | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|---|
Technical Reference Book
|
Central Library, IIT Bhubaneswar | Central Library, IIT Bhubaneswar | SES | 621.395 HAC/L (Browse shelf(Opens below)) | Available | 10916 |
Total holds: 0
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| 621.395 GAY/O Op-amps and linear integrated circuits / | 621.395 GOP/I Introduction to Digital Microelectronic Circuits / | 621.395 GOP/I Introduction to Digital Microelectronic Circuits / | 621.395 HAC/L Logic synthesis and verification algorithms / | 621.395 HUR/V VLSI testing : digital and mixed analogue/digital techniques / | 621.395 ITO/U Ultra-low voltage nano-scale memories | 621.395 IYE/S Simulating non-linear circuits with Python power electronics : |
Includes bibliographical references and index.
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