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003 | IN-BhIIT | ||
005 | 20240927182220.0 | ||
008 | 151218s9999 xx 000 0 und d | ||
020 | _a9788177589184 | ||
040 | _aCLIITBBS | ||
041 | _aeng | ||
082 | 0 | 0 |
_a621.392 _bPAL/V |
100 |
_aPalnitkar, Samir _eauthor _910982 |
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245 | 1 | 0 |
_aVerilog HDL : _ba guide to digital design and synthesis / _cby Samir Palnitkar. |
250 | _a2nd ed. | ||
260 |
_aNew Delhi : _bPearson Education, _c2013. |
||
300 |
_axlii, 450 p. : _bill. + _eCD |
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504 | _aIncludes Index. | ||
650 | _aVerilog | ||
942 |
_cTRB _084 |
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999 |
_c5823 _d5823 |