000 | 00724 a2200241 4500 | ||
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001 | 10751 | ||
003 | IN-BhIIT | ||
005 | 20240320131927.0 | ||
008 | 240319b |||||||| |||| 00| 0 eng d | ||
020 | _a9788178000381 | ||
020 | _a8178000385 | ||
040 | _aIN-BhIIT | ||
041 | _aeng | ||
082 |
_a621.3815 _bLAL/F |
||
100 |
_aLala Parag K. _eAuthor _921868 |
||
245 |
_aFault tolerant and fault testable hardware design / _cby Parag K. Lala. |
||
260 |
_aHyderabad : _bB S Publications, _c2014. |
||
300 |
_a263 p.: _bill. ; _c24 cm. |
||
504 | _aIncluding bibliographic reference and index. | ||
650 |
_aDigital circuits _922829 |
||
650 |
_aElectronics _xcommunications engineering. _922830 |
||
942 |
_cTRB _01 |
||
999 |
_c13618 _d13618 |