| 000 | 00761 a2200229 4500 | ||
|---|---|---|---|
| 001 | 10750 | ||
| 003 | IN-BhIIT | ||
| 005 | 20240320131927.0 | ||
| 008 | 240319b |||||||| ||||621.3815 00| 0 eng d | ||
| 020 | _a9788132214403 | ||
| 040 | _aIN-BhIIT | ||
| 041 | _aeng | ||
| 082 |
_a621.3815 _bNAV/D |
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| 100 |
_aNavabi, Zainalabedin. _eAuthor _922827 |
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| 245 |
_aDigital system test and testable design: _busing HDL models and architectures / _cby Zainalabedin Navabi. |
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| 260 |
_aNew Delhi : _bSpringer, _c2011. |
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| 300 |
_axxii, 435 p. : _bill. ; _c24 cm. |
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| 504 | _aIncluding bibliography and index. | ||
| 650 |
_aDigital electronics _xData processing. _915064 |
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| 650 |
_aElectronic circuit design _xData processing. _922828 |
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| 942 |
_cTRB _01 |
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| 999 |
_c13617 _d13617 |
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