000 | 01080nam a22002417a 4500 | ||
---|---|---|---|
001 | 9650 | ||
003 | IN-BhIIT | ||
005 | 20201012105250.0 | ||
008 | 201012b ||||| |||| 00| 0 eng d | ||
020 | _a9781493942626 | ||
040 | _aIN-BhIIT | ||
041 | _aeng | ||
082 |
_a621.3815 _bMOI/M |
||
100 |
_aMoiseev, Konstantin _eauthor _914392 |
||
245 |
_aMulti-net optimization of VLSI Interconnect / _cKonstantin Moiseev, Avinoam Kolodny and Shmuel Wimer |
||
260 |
_aNew York : _bSpringer, _c2015. |
||
300 |
_axvi, 233 p. : _bill. ; _c24 cm. |
||
520 | _aThis book examines design and migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects, covering scaling-dependent models for interconnect power, interconnect delay and crosstalk noise, plus design optimization problems. | ||
650 |
_aInterconnects (Integrated circuit technology) _aElectronics engineering. _aIntegrated circuits -- Very large scale integration. _914393 |
||
700 |
_aKolodny, Avinoam _eauthor _914394 |
||
700 |
_aWimer, Shmuel _eauthor _914395 |
||
942 | _cTRB | ||
999 |
_c11232 _d11232 |