CMOS : (Record no. 10247)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00608nam a22002177a 4500 |
| 001 - CONTROL NUMBER | |
| control field | TB9292 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IN-BhIIT |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200214140701.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 200124b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9788126520374 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | IN-BhIIT |
| 041 ## - LANGUAGE CODE | |
| Language code of text | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.397 |
| Book number | BAK/C |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Baker, Jacob J. |
| Relator term | author |
| 245 10 - TITLE STATEMENT | |
| Title | CMOS : |
| Sub Title | circuit design, layout, and simulation / |
| Statement of responsibility, etc | by Jacob J. Baker |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi : |
| Name of publisher | Wiley India, |
| Year of publication | 2010 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xxxiii, 1038 p. : |
| Other physical details(ill.) | illustrations ; |
| Dimensions(size) | 23cm |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc | Includes index. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Text Book |
| Koha issues (borrowed), all copies | 1 |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Date acquired | Full call number | Accession Number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Not withdrawn | Not Lost | not damaged | Central Library, IIT Bhubaneswar | Central Library, IIT Bhubaneswar | 24/01/2020 | 621.397 BAK/C | TB9292 | 24/01/2020 | Text Book |